THM41001L-10
Toshiba Corporation
- Lifecycle statusDiscontinued
- DescriptionNibble Mode DRAM, 1MX4, 100ns, CMOS
- Category
- ECCNEAR99
- ECCN GovernanceEAR
- HTS Code8542.32.00.02
- SB Code8542.32.00.15
- I/O TypeSEPARATE
- TechnologyCMOS
- Memory Width4
- Organization1MX4
- JESD-609 Codee0
- Surface MountNO
- Memory Density4194304 bit
- Memory IC TypeNIBBLE MODE DRAM
- Refresh Cycles512
- Terminal Pitch2.54 mm
- Access Time-Max100 ns
- Number of Words1048576 words
- Terminal FinishTin/Lead (Sn/Pb)
- Temperature GradeCOMMERCIAL
- Terminal PositionSINGLE
- Supply Current-Max240 mA
- Number of Terminals25
- Number of Words Code1M
- Qualification StatusNot Qualified
- Package Body MaterialPLASTIC/EPOXY
- Output Characteristics3-STATE
- Package Equivalence CodeSIP25,.2
- Operating Temperature-Max70 Cel
- Operating Temperature-Min0 Cel
- Supply Voltage-Nom (Vsup)5 V
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THM41001L-10