BUS BUFFERS

Part Number Description Supplier Availability Price Range
Bus Buffer, BIPolar, PDSO8
P82B96TD,118 Datasheet
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    5,000
RECENT LOW $9.04073
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2-bit bidirectional 2.7- to 5.5-V hot swappable 400-kHz I2C/SMBus buffer 8-VSSOP -40 to 85
TCA4311ADGKR Datasheet
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    9,815
RECENT LOW $0.97865
RECENT HIGH $2.19190
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2-bit bidirectional 2.7- to 5.5-V hot swappable 400-kHz I2C/SMBus buffer 8-SOIC -40 to 85
TCA4311ADR Datasheet
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    13,458
RECENT LOW $0.97865
RECENT HIGH $2.19190
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Bus Buffer, CMOS, PDSO10
LTC4304CDD Datasheet
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Bus Buffer, CMOS, PDSO10
LTC4304IDD#TR Datasheet
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Bus Buffer, CMOS
LTC4301LIDD8 Datasheet
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The LTC4315 is a hot-swappable 2-wire bus buffer that provides bidirectional buffering, while maintaining a low offset voltage and high noise margin up to 0.3 • VCC. The high noise margin allows the LTC4315 to be interoperable with devices that drive a high VOL (>0.4V) and allows multiple LTC4315s to be cascaded. The LTC4315 supports level translation between 1.5V, 1.8V, 2.5V, 3.3V and 5V busses.During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. Connection is established between the input and output after ENABLE is asserted high and a stop bit or bus idle condition has been detected on the SDA and SCL pins.If both data and clock are not simultaneously high at least once in 45ms and DISCEN is high, a FAULT signal is generated indicating a stuck bus low condition and the input is disconnected from the output. Up to 16 clock pulses are subsequently generated to free the stuck bus. A three state ACC pin enables input and output side rise time accelerators of various strengths.Applications Capacitance Buffers/Bus Extender Live Board Insertion Telecommunications Systems Including ATCA Level Translation PMBus Servers
LTC4315IMS#PBF Datasheet
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Bus Buffer, CMOS, PDSO8
ISL33002IUZ-T Datasheet
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Bus Buffer, CMOS, PDSO8
LTC4301LIMS8 Datasheet
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The LTC4303 hot swappable 2-wire Bus Buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. When a connection is made, the LTC4303 provides bidirectional buffering, keeping the backplane and card capacitances isolated. If SDAOUT or SCLOUT is low for ≥ 30ms (typ), the LTC4303 automatically breaks the data and clock bus connection. At this time the LTC4303 automatically generates up to 16 clock pulses on SCLOUT in an attempt to free the bus. A connection will be enabled automatically when the bus becomes free.Rise-time accelerator circuitry allows the use of larger pull-up resistors while still meeting rise-time requirements. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. When driven high, ENABLE allows the LTC4303 to connect after a stop bit or bus idle occurs. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY is an open drain output that indicates when the backplane and card sides are connected together.Applications Hot Board Insertion Servers Capacitance Buffer/Bus Extender RAID Systems
LTC4303IMS8#TRPBF Datasheet
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Bus Buffer, CMOS, PDSO12
LTC4315CMS#TRPBF Datasheet
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Bus Buffer, PDSO8
LTC4301LIMS8 Datasheet
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Bus Buffer, CMOS, PDSO10
LTC4302IMS-1 Datasheet
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Bus Buffer, PDSO8
LTC4303IDD#TR Datasheet
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Bus Buffer, CMOS, PDSO10
LTC4304IDD#TRPBF Datasheet
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The LTC4304 hot swappable 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. When a connection is made, the LTC4304 provides bidirectional buffering, keeping the backplane and card capacitances isolated. If SDAOUT or SCLOUT is low for ≥30ms (typ), the LTC4304 automatically breaks the data and clock bus connection and FAULT will pull low. At this time the LTC4304 automatically generates up to 16 clock pulses on SCLOUT in an attempt to free the bus. A connection will be enabled automatically when the bus becomes free. A logic low on the ACC input enables the LTC4304's rise-time accelerators. A logic high on ACC disables the rise-time accelerators, which allows SDA and SCL bus pull-up voltages below VCC.During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. When driven high, ENABLE allows the LTC4304 to connect after a stop bit or bus idle occurs. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY is an open drain output that indicates when the backplane and card sides are connected together.Applications Hot Board Insertion Servers Capacitance Buffer/Bus Extender RAID Systems
LTC4304IMS#PBF Datasheet
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Bus Buffer, CMOS, PDSO10
LTC4304IDD Datasheet
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Bus Buffer, PDSO8
LTC4301LIMS8#TR Datasheet
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The LTC4301L hot swappable, 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. In addition, the LTC4301L SDAIN and SCLIN pins are compatible with systems with pull-up voltages as low as 1V. Control circuitry prevents the backplane from being connected to the card until a stop bit or a bus idle is present. When the connection is made, the LTC4301L provides bidirectional buffering, keeping the backplane and card capacitances isolated.When driven low, the CS input pin allows the part to connect after a stop bit or bus idle occurs. Driving CS high breaks the connection between SCLIN and SCLOUT and between SDAIN and SDAOUT. A logic high on READY indicates that the backplane and card sides are connected together.The LTC4301L is offered in 8-pin DFN (3mm x 3mm) and MSOP packages.Applications Hot Board Insertion Servers Capacitance Buffer/Bus Extender Desktop Computers
LTC4301LCDD#PBF Datasheet
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The LTC4301L hot swappable, 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. In addition, the LTC4301L SDAIN and SCLIN pins are compatible with systems with pull-up voltages as low as 1V. Control circuitry prevents the backplane from being connected to the card until a stop bit or a bus idle is present. When the connection is made, the LTC4301L provides bidirectional buffering, keeping the backplane and card capacitances isolated.When driven low, the CS input pin allows the part to connect after a stop bit or bus idle occurs. Driving CS high breaks the connection between SCLIN and SCLOUT and between SDAIN and SDAOUT. A logic high on READY indicates that the backplane and card sides are connected together.The LTC4301L is offered in 8-pin DFN (3mm x 3mm) and MSOP packages.Applications Hot Board Insertion Servers Capacitance Buffer/Bus Extender Desktop Computers
LTC4301LCMS8#PBF Datasheet
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Bus Buffer, PDSO8
LTC4301LCMS8#TR Datasheet
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Bus Buffer, PDSO8
PCA9605D Datasheet
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The LTC4302-1/LTC4302-2 addressable I2C bus and SMBus compatible bus buffers allow a peripheral board to be inserted and removed from a live backplane without corruption of the bus. The LTC4302-1/LTC4302-2 maintain electrical isolation between the backplane and peripheral board until their VCC supply is valid and a master device on the backplane side addresses the LTC4302-1/LTC4302-2 and commands them to connect. The LTC4302-1/LTC4302-2’s ADDRESS pin provides 32 possible addresses set by an external resistive divider between VCC and GND. The LTC4302-1/LTC4302-2 work with supply voltages ranging from 2.7V to 5.5V. The SDA and SCL inputs and outputs do not load the bus lines when VCC is low.Rise time accelerator circuitry allows for heavier capacitive bus loading while still meeting system timing requirements. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. Two general purpose input/output pins (GPIOs) on the LTC4302-1 can be configured as inputs, open-drain outputs or push-pull outputs. The LTC4302-2 option replaces one GPIO pin with a second supply voltage pin VCC2, providing level shifting between systems with different supply voltages. The LTC4302-1/LTC4302-2 are available in a 10-pin MSOP package.Applications Live Board Insertion 5V/3.3V Level Translator Servers Capacitance Buffer/Bus Extender Nested Addressing
LTC4302IMS-1#TRPBF Datasheet
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Bus Buffer, CMOS, PDSO10
LTC4304CDD#TR Datasheet
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Bus Buffer, PDSO10
LTC4302CMS-2#TR Datasheet
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