ZL30265LDG1 by Microsemi Corporation | Sourcengine

Microsemi Corporation ZL30265LDG1

Lifecycle status
Transferred
REACH
REACH compliant
Description
PLL Based Clock Driver, 30265 Series, 12 True Output(s), 0 Inverted Output(s)
Category
Semiconductors Logic ICs Clock Drivers PLL BASED CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
30265
Width (mm)
8
Length (mm)
8
JESD-30 Code
S-XQCC-N56
Package Code
HVQCCN
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
SQUARE
Package Style
CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE Meter
Surface Mount
YES
Terminal Form
NO LEAD
Packing Method
TRAY
fmax-Min (MHz)
1045
Temperature Grade
INDUSTRIAL
Terminal Position
QUAD
Additional Feature
ALSO OPERATES AT 2.5 V AND 3.3 V POWER SUPPLY
Input Conditioning
DIFFERENTIAL MUX
Number of Functions
1
Number of Terminals
56
Terminal Pitch (mm)
0.5
Package Body Material
UNSPECIFIED
Number of True Outputs
12
Output Characteristics
3-STATE WITH SERIES RESISTOR
Propagation Delay (ns)
3.8
Seated Height-Max (mm)
1
Supply Voltage-Max (V)
1.89
Supply Voltage-Min (V)
1.71
Supply Voltage-Nom (V)
1.8
Supply Current-Max (mA)
852
Package Equivalence Code
LCC56,.31SQ,20
Number of Inverted Outputs
0
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Same Edge Clock Skew Delay-Max (ns)
0.1