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XCV100E-6FGG256I

Xilinx,Inc.

Xilinx,Inc. XCV100E-6FGG256I
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • Technology
    CMOS
  • Width (mm)
    17
  • Length (mm)
    17
  • JESD-30 Code
    S-PBGA-B256
  • Organization
    600 CLBS, 32400 GATES
  • Package Code
    BGA
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY Meter
  • Surface Mount
    YES
  • Terminal Form
    BALL
  • J-STD-609 Code
    e1
  • Number of CLBs
    600
  • Terminal Finish
    Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
  • Number of Inputs
    176
  • DLA Qualification
    Not Qualified
  • Number of Outputs
    176
  • Terminal Position
    BOTTOM
  • Number of Terminals
    256
  • Terminal Pitch (mm)
    1
  • Number of Logic Cells
    2700
  • Package Body Material
    PLASTIC/EPOXY
  • Seated Height-Max (mm)
    2
  • Supply Voltage-Max (V)
    1.89
  • Supply Voltage-Min (V)
    1.71
  • Supply Voltage-Nom (V)
    1.8
  • Programmable Logic Type
    FIELD PROGRAMMABLE GATE ARRAY
  • Package Equivalence Code
    BGA256,16X16,40
  • Clock Frequency-Max (MHz)
    357
  • Moisture Sensitivity Level
    3
  • Number of Equivalent Gates
    32400
  • Peak Reflow Temperature (Cel)
    260
  • Operating Temperature-Max (Cel)
    100
  • Operating Temperature-Min (Cel)
    -40
  • Time@Peak Reflow Temperature-Max (s)
    30
  • Combinatorial Delay of a CLB-Max (ns)
    0.47

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XCV100E-6FGG256I
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XCV100E-6FGG256I