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XC7V585T-2FF1761I

Xilinx,Inc.

Xilinx,Inc. XC7V585T-2FF1761I
  • ECCN
    3A001.A.7.A
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • Technology
    CMOS
  • JESD-30 Code
    S-PBGA-B1761
  • Package Code
    BGA
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY Meter
  • Surface Mount
    YES
  • Terminal Form
    BALL
  • J-STD-609 Code
    e0
  • Terminal Finish
    TIN LEAD
  • Number of Inputs
    750
  • DLA Qualification
    Not Qualified
  • Number of Outputs
    750
  • Terminal Position
    BOTTOM
  • Number of Terminals
    1761
  • Terminal Pitch (mm)
    1
  • Number of Logic Cells
    582720
  • Package Body Material
    PLASTIC/EPOXY
  • Supply Voltage-Max (V)
    1.03
  • Supply Voltage-Min (V)
    0.97
  • Supply Voltage-Nom (V)
    1
  • Programmable Logic Type
    FIELD PROGRAMMABLE GATE ARRAY
  • Package Equivalence Code
    BGA1760,42X42,40
  • Clock Frequency-Max (MHz)
    933
  • Combinatorial Delay of a CLB-Max (ns)
    0.61

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XC7V585T-2FF1761I