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XC4025E-4PGG299M

Xilinx,Inc.

Xilinx,Inc. XC4025E-4PGG299M
  • ECCN
    3A001.a.2.c
  • ECCN Governance
    EAR
  • HTS Code
    8542.31.00.60
  • SB Code
    8542.31.00.60
  • Technology
    CMOS
  • Width (mm)
    52.324
  • Length (mm)
    52.324
  • JESD-30 Code
    S-CPGA-P299
  • Organization
    1024 CLBS, 15000 GATES
  • Package Code
    PGA
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY Meter
  • Surface Mount
    NO
  • Terminal Form
    PIN/PEG
  • J-STD-609 Code
    e3
  • Number of CLBs
    1024
  • Terminal Finish
    MATTE TIN
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    MILITARY
  • Terminal Position
    PERPENDICULAR
  • Additional Feature
    TYP. GATES = 15000-45000
  • Number of Terminals
    299
  • Terminal Pitch (mm)
    2.54
  • Package Body Material
    CERAMIC, METAL-SEALED COFIRED
  • Seated Height-Max (mm)
    4.318
  • Supply Voltage-Max (V)
    5.5
  • Supply Voltage-Min (V)
    4.5
  • Supply Voltage-Nom (V)
    5
  • Programmable Logic Type
    FIELD PROGRAMMABLE GATE ARRAY
  • Package Equivalence Code
    PGA299,20X20
  • Clock Frequency-Max (MHz)
    111
  • Number of Equivalent Gates
    15000
  • Operating Temperature-Max (Cel)
    125
  • Operating Temperature-Min (Cel)
    -55
  • Combinatorial Delay of a CLB-Max (ns)
    3.9

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XC4025E-4PGG299M