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XC4020-5PQG208I

Xilinx,Inc.

Xilinx,Inc. XC4020-5PQG208I
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.31.00.60
  • Technology
    CMOS
  • Width (mm)
    28
  • Length (mm)
    28
  • JESD-30 Code
    S-PQFP-G208
  • Organization
    784 CLBS, 16000 GATES
  • Package Code
    FQFP
  • Package Shape
    SQUARE
  • Package Style
    FLATPACK, FINE PITCH Meter
  • Surface Mount
    YES
  • Terminal Form
    GULL WING
  • J-STD-609 Code
    e3
  • Number of CLBs
    784
  • Terminal Finish
    MATTE TIN
  • DLA Qualification
    Not Qualified
  • Terminal Position
    QUAD
  • Additional Feature
    2016 FLIP-FLOPS; TYP. GATES = 16000-20000
  • Number of Terminals
    208
  • Terminal Pitch (mm)
    0.5
  • Package Body Material
    PLASTIC/EPOXY
  • Seated Height-Max (mm)
    3.92
  • Supply Voltage-Max (V)
    5.5
  • Supply Voltage-Min (V)
    4.5
  • Supply Voltage-Nom (V)
    5
  • Programmable Logic Type
    FIELD PROGRAMMABLE GATE ARRAY
  • Package Equivalence Code
    QFP208,1.2SQ,20
  • Moisture Sensitivity Level
    3
  • Number of Equivalent Gates
    16000
  • Peak Reflow Temperature (Cel)
    245
  • Time@Peak Reflow Temperature-Max (s)
    30
  • Combinatorial Delay of a CLB-Max (ns)
    4.5

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XC4020-5PQG208I