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XC40125XV-2BG432C

Xilinx,Inc.

Xilinx,Inc. XC40125XV-2BG432C
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.31.00.60
  • Technology
    CMOS
  • JESD-30 Code
    S-PBGA-B432
  • Package Code
    BGA
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY Meter
  • Surface Mount
    YES
  • Terminal Form
    BALL
  • J-STD-609 Code
    e0
  • Terminal Finish
    TIN LEAD
  • Number of Inputs
    448
  • DLA Qualification
    Not Qualified
  • Number of Outputs
    448
  • Terminal Position
    BOTTOM
  • Number of Terminals
    432
  • Terminal Pitch (mm)
    1.27
  • Number of Logic Cells
    10982
  • Package Body Material
    PLASTIC/EPOXY
  • Programmable Logic Type
    FIELD PROGRAMMABLE GATE ARRAY
  • Package Equivalence Code
    BGA432,31X31,50
  • Clock Frequency-Max (MHz)
    166
  • Moisture Sensitivity Level
    3
  • Peak Reflow Temperature (Cel)
    225
  • Time@Peak Reflow Temperature-Max (s)
    30

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XC40125XV-2BG432C