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XC3S50-5PQ208C

Xilinx,Inc.

Xilinx,Inc. XC3S50-5PQ208C
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • Width
    28 mm
  • Length
    28 mm
  • Technology
    CMOS
  • JESD-30 Code
    S-PQFP-G208
  • Organization
    192 CLBS, 50000 GATES
  • Package Code
    FQFP
  • JESD-609 Code
    e4
  • Package Shape
    SQUARE
  • Package Style
    FLATPACK, FINE PITCH Meter
  • Surface Mount
    YES
  • Terminal Form
    GULL WING
  • Number of CLBs
    192
  • Terminal Pitch
    0.5 mm
  • Terminal Finish
    NICKEL PALLADIUM GOLD
  • Number of Inputs
    124
  • Number of Outputs
    124
  • Seated Height-Max
    4.1 mm
  • Temperature Grade
    OTHER
  • Terminal Position
    QUAD
  • Supply Voltage-Max
    1.26 V
  • Supply Voltage-Min
    1.14 V
  • Supply Voltage-Nom
    1.2 V
  • Clock Frequency-Max
    725 MHz
  • Number of Terminals
    208
  • Qualification Status
    Not Qualified
  • Number of Logic Cells
    1728
  • Package Body Material
    PLASTIC/EPOXY
  • Programmable Logic Type
    FIELD PROGRAMMABLE GATE ARRAY
  • Package Equivalence Code
    QFP208,1.2SQ,20
  • Operating Temperature-Max
    85 Cel
  • Operating Temperature-Min
    0 Cel
  • Moisture Sensitivity Level
    3
  • Number of Equivalent Gates
    50000
  • Combinatorial Delay of a CLB-Max
    0.53 ns

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XC3S50-5PQ208C