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XC2VP100-5FFG1696C

Xilinx,Inc.

Xilinx,Inc. XC2VP100-5FFG1696C
  • ECCN
    3A001.A.7.A
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • Width
    42.5 mm
  • Length
    42.5 mm
  • Technology
    CMOS
  • JESD-30 Code
    S-PBGA-B1696
  • Organization
    11024 CLBS
  • Package Code
    BGA
  • JESD-609 Code
    e1
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY Meter
  • Surface Mount
    YES
  • Terminal Form
    BALL
  • Number of CLBs
    11024
  • Terminal Pitch
    1 mm
  • Terminal Finish
    Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
  • Number of Inputs
    1164
  • Number of Outputs
    1164
  • Seated Height-Max
    3.45 mm
  • Temperature Grade
    OTHER
  • Terminal Position
    BOTTOM
  • Supply Voltage-Max
    1.575 V
  • Supply Voltage-Min
    1.425 V
  • Supply Voltage-Nom
    1.5 V
  • Clock Frequency-Max
    1050 MHz
  • Number of Terminals
    1696
  • Qualification Status
    Not Qualified
  • Number of Logic Cells
    99216
  • Package Body Material
    PLASTIC/EPOXY
  • Programmable Logic Type
    FIELD PROGRAMMABLE GATE ARRAY
  • Package Equivalence Code
    BGA1696,42X42,40
  • Operating Temperature-Max
    85 Cel
  • Operating Temperature-Min
    0 Cel
  • Moisture Sensitivity Level
    4
  • Peak Reflow Temperature (Cel)
    245
  • Combinatorial Delay of a CLB-Max
    0.36 ns
  • Time@Peak Reflow Temperature-Max (s)
    30

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XC2VP100-5FFG1696C