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XC2V40-4CSG144C

Xilinx,Inc.

Xilinx,Inc. XC2V40-4CSG144C
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • Width
    12 mm
  • Length
    12 mm
  • Technology
    CMOS
  • JESD-30 Code
    S-PBGA-B144
  • Organization
    64 CLBS, 40000 GATES
  • Package Code
    TFBGA
  • JESD-609 Code
    e1
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY, THIN PROFILE, FINE PITCH Meter
  • Surface Mount
    YES
  • Terminal Form
    BALL
  • Number of CLBs
    64
  • Terminal Pitch
    0.8 mm
  • Terminal Finish
    Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5)
  • Number of Inputs
    88
  • Number of Outputs
    88
  • Seated Height-Max
    1.2 mm
  • Temperature Grade
    OTHER
  • Terminal Position
    BOTTOM
  • Supply Voltage-Max
    1.575 V
  • Supply Voltage-Min
    1.425 V
  • Supply Voltage-Nom
    1.5 V
  • Clock Frequency-Max
    650 MHz
  • Number of Terminals
    144
  • Qualification Status
    Not Qualified
  • Number of Logic Cells
    576
  • Package Body Material
    PLASTIC/EPOXY
  • Programmable Logic Type
    FIELD PROGRAMMABLE GATE ARRAY
  • Package Equivalence Code
    BGA144,13X13,32
  • Operating Temperature-Max
    85 Cel
  • Operating Temperature-Min
    0 Cel
  • Moisture Sensitivity Level
    3
  • Number of Equivalent Gates
    40000
  • Peak Reflow Temperature (Cel)
    260
  • Combinatorial Delay of a CLB-Max
    0.44 ns
  • Time@Peak Reflow Temperature-Max (s)
    30

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XC2V40-4CSG144C