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XC2S100-5TQ144Q

Xilinx,Inc.

Xilinx,Inc. XC2S100-5TQ144Q
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.39.00.00
  • Width
    20 mm
  • Length
    20 mm
  • Technology
    CMOS
  • JESD-30 Code
    S-PQFP-G144
  • Organization
    600 CLBS, 100000 GATES
  • Package Code
    LFQFP
  • JESD-609 Code
    e0
  • Package Shape
    SQUARE
  • Package Style
    FLATPACK, LOW PROFILE, FINE PITCH Meter
  • Surface Mount
    YES
  • Terminal Form
    GULL WING
  • Number of CLBs
    600
  • Terminal Pitch
    0.5 mm
  • Terminal Finish
    Tin/Lead (Sn85Pb15)
  • Number of Inputs
    96
  • Number of Outputs
    92
  • Seated Height-Max
    1.6 mm
  • Temperature Grade
    AUTOMOTIVE
  • Terminal Position
    QUAD
  • Supply Voltage-Max
    2.625 V
  • Supply Voltage-Min
    2.375 V
  • Supply Voltage-Nom
    2.5 V
  • Clock Frequency-Max
    263 MHz
  • Number of Terminals
    144
  • Qualification Status
    Not Qualified
  • Number of Logic Cells
    2700
  • Package Body Material
    PLASTIC/EPOXY
  • Programmable Logic Type
    FIELD PROGRAMMABLE GATE ARRAY
  • Package Equivalence Code
    QFP144,.87SQ,20
  • Operating Temperature-Max
    125 Cel
  • Operating Temperature-Min
    -40 Cel
  • Moisture Sensitivity Level
    3
  • Number of Equivalent Gates
    100000
  • Peak Reflow Temperature (Cel)
    225
  • Time@Peak Reflow Temperature-Max (s)
    30

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XC2S100-5TQ144Q