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XAC2C128-8VQG100Q

Xilinx,Inc.

Xilinx,Inc. XAC2C128-8VQG100Q
  • HTS Code
    8542.39.00.01
  • SB Code
    8542.31.00.55
  • JTAG BST
    YES
  • Technology
    CMOS
  • Width (mm)
    14
  • Length (mm)
    14
  • Architecture
    PLA-TYPE
  • JESD-30 Code
    S-PQFP-F100
  • Organization
    0 DEDICATED INPUTS, 80 I/O
  • Package Code
    QFF
  • Package Shape
    SQUARE
  • Package Style
    FLATPACK Meter
  • Surface Mount
    YES
  • Terminal Form
    FLAT
  • J-STD-609 Code
    e3
  • Output Function
    MACROCELL
  • Terminal Finish
    MATTE TIN
  • Number of Inputs
    80
  • DLA Qualification
    Not Qualified
  • Number of Outputs
    80
  • Temperature Grade
    AUTOMOTIVE
  • Terminal Position
    QUAD
  • Additional Feature
    YES
  • Number of I/O Lines
    80
  • Number of Terminals
    100
  • Terminal Pitch (mm)
    0.5
  • Number of Macro Cells
    128
  • Package Body Material
    PLASTIC/EPOXY
  • In-System Programmable
    YES
  • Propagation Delay (ns)
    7.5
  • Seated Height-Max (mm)
    1.2
  • Supply Voltage-Max (V)
    1.9
  • Supply Voltage-Min (V)
    1.7
  • Supply Voltage-Nom (V)
    1.8
  • Programmable Logic Type
    FLASH PLD
  • Package Equivalence Code
    TQFP100,.63SQ
  • Clock Frequency-Max (MHz)
    119
  • Moisture Sensitivity Level
    3
  • Number of Dedicated Inputs
    0
  • Peak Reflow Temperature (Cel)
    260
  • Operating Temperature-Max (Cel)
    125
  • Operating Temperature-Min (Cel)
    -40
  • Screening Level / Reference Standard
    AEC-Q100
  • Time@Peak Reflow Temperature-Max (s)
    30

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XAC2C128-8VQG100Q