XA3S100E-4VQG100Q
Xilinx,Inc.
- Lifecycle statusTransferred
- RoHSRoHS compliant
- REACHREACH compliant
- DescriptionField Programmable Gate Array, 240 CLBs, 100000 Gates, 572MHz, 2160-Cell, CMOS, PQFP100
- Category
- ECCNEAR99
- ECCN GovernanceEAR
- HTS Code8542.39.00.01
- SB Code8542.39.00.00
- TechnologyCMOS
- Width (mm)14
- Length (mm)14
- JESD-30 CodeS-PQFP-G100
- Organization240 CLBS, 100000 GATES
- Package CodeTFQFP
- Package ShapeSQUARE
- Package StyleFLATPACK, THIN PROFILE, FINE PITCH Meter
- Surface MountYES
- Terminal FormGULL WING
- J-STD-609 Codee3
- Number of CLBs240
- Terminal FinishMATTE TIN
- Number of Inputs66
- DLA QualificationNot Qualified
- Number of Outputs59
- Temperature GradeAUTOMOTIVE
- Terminal PositionQUAD
- Number of Terminals100
- Terminal Pitch (mm)0.5
- Number of Logic Cells2160
- Package Body MaterialPLASTIC/EPOXY
- Seated Height-Max (mm)1.2
- Supply Voltage-Max (V)1.26
- Supply Voltage-Min (V)1.14
- Supply Voltage-Nom (V)1.2
- Programmable Logic TypeFIELD PROGRAMMABLE GATE ARRAY
- Package Equivalence CodeTQFP100,.63SQ
- Clock Frequency-Max (MHz)572
- Moisture Sensitivity Level3
- Number of Equivalent Gates100000
- Peak Reflow Temperature (Cel)260
- Operating Temperature-Max (Cel)125
- Operating Temperature-Min (Cel)-40
- Screening Level / Reference StandardAEC-Q100
- Time@Peak Reflow Temperature-Max (s)30
- Combinatorial Delay of a CLB-Max (ns)4.88
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