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UPD72107L

Renesas Electronics Corp.

Renesas Electronics Corp. UPD72107L
  • HTS Code
    8542.31.00.01
  • SB Code
    8542.31.00.30
  • Technology
    CMOS
  • JESD-30 Code
    S-PQCC-J68
  • Package Code
    QCCJ
  • Boundary Scan
    NO
  • Package Shape
    SQUARE
  • Package Style
    CHIP CARRIER Meter
  • Surface Mount
    YES
  • Terminal Form
    J BEND
  • J-STD-609 Code
    e0
  • Terminal Finish
    Tin/Lead (Sn/Pb)
  • Address Bus Width
    24
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    INDUSTRIAL
  • Terminal Position
    QUAD
  • Number of Terminals
    68
  • Terminal Pitch (mm)
    1.27
  • Number of Serial I/Os
    1
  • Package Body Material
    PLASTIC/EPOXY
  • Communication Standard
    ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; X.25; BISYNC
  • Supply Voltage-Max (V)
    5.5
  • Supply Voltage-Min (V)
    4.5
  • Supply Voltage-Nom (V)
    5
  • External Data Bus Width
    16
  • Supply Current-Max (mA)
    50
  • Package Equivalence Code
    LDCC68,1.0SQ
  • Clock Frequency-Max (MHz)
    8.2
  • uPs/uCs/Peripheral ICs Type
    SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
  • Data Encoding/Decoding Method
    NRZ; NRZI
  • Data Transfer Rate-Max (MBps)
    0.5
  • Operating Temperature-Max (Cel)
    85
  • Operating Temperature-Min (Cel)
    -40

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UPD72107L
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UPD72107L