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TT8050250-75

Intel Corporation

Intel Corporation TT8050250-75
  • ECCN
    3A991.a.2
  • ECCN Governance
    EAR
  • HTS Code
    8542.31.00.25
  • SB Code
    8542.31.00.25
  • Format
    FLOATING POINT
  • Bit Size
    32
  • Technology
    BICMOS
  • RAM (words)
    0
  • Speed (MHz)
    75
  • JESD-30 Code
    S-XUUC-N314
  • Package Code
    DIE
  • Boundary Scan
    YES
  • Package Shape
    SQUARE
  • Package Style
    UNCASED CHIP Meter
  • Surface Mount
    YES
  • Terminal Form
    NO LEAD
  • Low Power Mode
    YES
  • Integrated Cache
    NO
  • Address Bus Width
    32
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    OTHER
  • Terminal Position
    UPPER
  • Additional Feature
    DYNAMIC BRANCH PREDICTION; SYSTEM MANAGEMENT MODE; CONTROL ROM; OPTEMP SPECIFIED AS TC
  • Number of Terminals
    314
  • Number of Serial I/Os
    0
  • Package Body Material
    UNSPECIFIED
  • Number of DMA Channels
    0
  • On Chip Data RAM Width
    0
  • Supply Voltage-Max (V)
    3.465
  • Supply Voltage-Min (V)
    2.735
  • Supply Voltage-Nom (V)
    3.3
  • External Data Bus Width
    64
  • Supply Current-Max (mA)
    1565
  • Package Equivalence Code
    TAB,320PINS,.01
  • Clock Frequency-Max (MHz)
    50
  • uPs/uCs/Peripheral ICs Type
    MICROPROCESSOR
  • Number of External Interrupts
    3
  • Operating Temperature-Max (Cel)
    95
  • Operating Temperature-Min (Cel)
    0

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TT8050250-75
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TT8050250-75