TA5C180-90
Intel Corporation
- Lifecycle statusDiscontinued
- DescriptionUV PLD, 90ns, 48-Cell, CMOS, CPGA68
- Category
- HTS Code8542.39.00.01
- SB Code8542.31.00.55
- JTAG BSTNO
- TechnologyCMOS
- JESD-30 CodeS-XPGA-P68
- Package CodePGA
- Package ShapeSQUARE
- Package StyleGRID ARRAY Meter
- Surface MountNO
- Terminal FormPIN/PEG
- J-STD-609 Codee0
- Terminal FinishTin/Lead (Sn/Pb)
- DLA QualificationNot Qualified
- Temperature GradeINDUSTRIAL
- Terminal PositionPERPENDICULAR
- Additional FeatureNO
- Number of Terminals68
- Terminal Pitch (mm)2.54
- Number of Macro Cells48
- Package Body MaterialCERAMIC
- In-System ProgrammableNO
- Propagation Delay (ns)90
- Supply Voltage-Nom (V)5
- Programmable Logic TypeUV PLD
- Package Equivalence CodePGA68,11X11
- Operating Temperature-Max (Cel)85
- Operating Temperature-Min (Cel)-40
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TA5C180-90