SN74LVTH182512DGG by Texas Instruments Incorporated | Sourcengine

Texas Instruments Incorporated SN74LVTH182512DGG

Lifecycle status
Discontinued
Description
Boundary Scan Reg Bus Transceiver, LVT Series, 2-Func, 9-Bit, True Output, BICMOS, PDSO64
Category
Semiconductors Logic ICs Bus Driver/Transceivers BOUNDARY SCAN REG BUS TRANSCEIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
LVT
Direction
BIDIRECTIONAL
Technology
BICMOS
Width (mm)
6.1
Length (mm)
17
Control Type
INDEPENDENT CONTROL
JESD-30 Code
R-PDSO-G64
Package Code
TSSOP
Trigger Type
POSITIVE EDGE
Logic IC Type
BOUNDARY SCAN REG BUS TRANSCEIVER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
Number of Bits
9
Number of Ports
2
Output Polarity
TRUE
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Additional Feature
WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
Number of Functions
2
Number of Terminals
64
Terminal Pitch (mm)
0.5
Package Body Material
PLASTIC/EPOXY
Output Characteristics
3-STATE
Propagation Delay (ns)
6.8
Seated Height-Max (mm)
1.2
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
2.7
Supply Voltage-Nom (V)
3.3
Supply Current-Max (mA)
24
Package Equivalence Code
TSSOP64,.32,20
Output Low Current-Max (mA)
64
Peak Reflow Temperature (Cel)
NOT SPECIFIED
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Propagation Delay-Max@Nom-Sup (ns)
5.7
Time@Peak Reflow Temperature-Max (s)
NOT SPECIFIED