SN74LVC112ADG4 by Texas Instruments Incorporated | Sourcengine

Texas Instruments Incorporated SN74LVC112ADG4

Lifecycle status
Discontinued
RoHS
RoHS compliant
REACH
REACH compliant
Description
J-K Flip-Flop, LVC/LCX/Z Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16
Category
Semiconductors Logic ICs FF/Latches J-K FLIP-FLOP

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
LVC/LCX/Z
Technology
CMOS
Width (mm)
3.9
Length (mm)
9.9
JESD-30 Code
R-PDSO-G16
Package Code
SOP
Trigger Type
NEGATIVE EDGE
Logic IC Type
J-K FLIP-FLOP
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e4
Number of Bits
2
Packing Method
TUBE
fmax-Min (MHz)
150
Output Polarity
COMPLEMENTARY
Terminal Finish
NICKEL PALLADIUM GOLD
DLA Qualification
Not Qualified
Temperature Grade
AUTOMOTIVE
Terminal Position
DUAL
Number of Functions
2
Number of Terminals
16
Terminal Pitch (mm)
1.27
Load Capacitance (pF)
50
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
7.1
Seated Height-Max (mm)
1.75
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
1.65
Supply Voltage-Nom (V)
1.8
Package Equivalence Code
SOP16,.25
Frequency-Max@Nom-Sup (Hz)
150000000
Moisture Sensitivity Level
1
Output Low Current-Max (mA)
24
Peak Reflow Temperature (Cel)
260
Operating Temperature-Max (Cel)
125
Operating Temperature-Min (Cel)
-40
Propagation Delay-Max@Nom-Sup (ns)
5.9
Time@Peak Reflow Temperature-Max (s)
30