SN74ALS6301JD by Texas Instruments Incorporated | Sourcengine

Texas Instruments Incorporated SN74ALS6301JD

Lifecycle status
Discontinued
Description
DRAM Controller, 1M X 16, Bipolar, CDIP52
Category
Semiconductors UPs/uCs/Peripheral ICs Memory Controllers MEMORY CONTROLLER, DRAM

HTS Code
8542.31.00.01
SB Code
8542.31.00.30

Technology
BIPOLAR
JESD-30 Code
R-CDIP-T52
Package Code
DIP
Boundary Scan
NO
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
Low Power Mode
NO
Number of Banks
4
Address Bus Width
20
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Memory Organization
1M X 16
Number of Terminals
52
Terminal Pitch (mm)
2.54
Package Body Material
CERAMIC, METAL-SEALED COFIRED
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
External Data Bus Width
0
Supply Current-Max (mA)
220
Package Equivalence Code
DIP52,.6
uPs/uCs/Peripheral ICs Type
MEMORY CONTROLLER, DRAM
Peak Reflow Temperature (Cel)
NOT SPECIFIED
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0
Time@Peak Reflow Temperature-Max (s)
NOT SPECIFIED