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SM4R-67024V-45LH

MATRA MHS

MATRA MHS SM4R-67024V-45LH
  • ECCN
    3A001.a.2.c
  • ECCN Governance
    EAR
  • HTS Code
    8542.32.00.41
  • SB Code
    8542.32.00.40
  • Technology
    CMOS
  • JESD-30 Code
    S-CQCC-N84
  • Memory Width
    16
  • Package Code
    QCCN
  • Output Enable
    YES
  • Package Shape
    SQUARE
  • Package Style
    CHIP CARRIER Meter
  • Surface Mount
    YES
  • Terminal Form
    NO LEAD
  • Memory IC Type
    MULTI-PORT SRAM
  • Operating Mode
    ASYNCHRONOUS
  • Number of Ports
    2
  • Parallel/Serial
    PARALLEL
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    MILITARY
  • Terminal Position
    QUAD
  • Additional Feature
    INTERRUPT FLAG; ARBITER; SEMAPHORE
  • Memory Organization
    4KX16
  • Number of Functions
    1
  • Number of Terminals
    84
  • Access Time-Max (ns)
    45
  • Number of Words Code
    4K
  • Memory Density (bits)
    65536
  • Package Body Material
    CERAMIC, METAL-SEALED COFIRED
  • Output Characteristics
    3-STATE
  • Supply Voltage-Max (V)
    5.5
  • Supply Voltage-Min (V)
    4.5
  • Supply Voltage-Nom (V)
    5
  • Number of Words (words)
    4096
  • Standby Voltage-Min (V)
    2
  • Operating Temperature-Max (Cel)
    125
  • Operating Temperature-Min (Cel)
    -55
  • Screening Level / Reference Standard
    MIL-STD-883 Class B (Modified)

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SM4R-67024V-45LH