SLG46824VTR by Renesas Electronics Corp. | Sourcengine

Renesas Electronics Corp. SLG46824VTR

Lifecycle status
Discontinued
RoHS
RoHS compliant
REACH
REACH compliant
Description
SPLD - Simple Programmable Logic Devices GPAK Mixed Signal Matrix
Category
Semiconductors Programmable Logic ICs Programmable Logic Devices OT PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

JTAG BST
NO
Width (mm)
2
Length (mm)
3
Architecture
PLA-TYPE
JESD-30 Code
R-XQCC-N20
Organization
0 DEDICATED INPUTS, 13 I/O
Package Code
VQCCN
Package Shape
RECTANGULAR
Package Style
CHIP CARRIER, VERY THIN PROFILE Meter
Surface Mount
YES
Terminal Form
NO LEAD
Packing Method
BOX, TR, 7-INCH
Output Function
MACROCELL
Number of Inputs
13
Number of Outputs
15
Terminal Position
QUAD
Number of I/O Lines
13
Number of Terminals
20
Terminal Pitch (mm)
0.4
Number of Macro Cells
19
Package Body Material
UNSPECIFIED
In-System Programmable
YES
Seated Height-Max (mm)
0.6
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
2.3
Supply Voltage-Nom (V)
2.5
Programmable Logic Type
OT PLD
Package Equivalence Code
LCC20,.08X.12,16
Number of Dedicated Inputs
0
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40