SI53320-B-GT by Silicon Laboratories, Inc. | Sourcengine

Silicon Laboratories, Inc. SI53320-B-GT

Lifecycle status
Active
RoHS
RoHS compliant
REACH
REACH compliant
Description
LVPECL 2:5 low-jitter clock buffer (725 MHz), 2:1 any-format input
Category
Semiconductors Logic ICs Clock Drivers LOW SKEW CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
53320
Technology
CMOS
Width (mm)
4.4
Length (mm)
6.5
JESD-30 Code
R-PDSO-G20
Package Code
TSSOP
Logic IC Type
LOW SKEW CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Additional Feature
ALSO OPERATES AT 3.3 V SUPPLY
Input Conditioning
DIFFERENTIAL MUX
Number of Functions
1
Number of Terminals
20
Terminal Pitch (mm)
0.65
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
5
Propagation Delay (ns)
1
Seated Height-Max (mm)
1.2
Supply Voltage-Max (V)
2.63
Supply Voltage-Min (V)
2.38
Supply Voltage-Nom (V)
2.5
Package Equivalence Code
TSSOP20,.25
Number of Inverted Outputs
0
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Propagation Delay-Max@Nom-Sup (ns)
1
Same Edge Clock Skew Delay-Max (ns)
0.06