QS5LV931-80Q by Integrated Device Technology, Inc. | Sourcengine

Integrated Device Technology, Inc. QS5LV931-80Q

Lifecycle status
Discontinued
Description
PLL Based Clock Driver, 5LV Series, 6 True Output(s), 0 Inverted Output(s), CMOS, PDSO20
Category
Semiconductors Logic ICs Clock Drivers PLL BASED CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
5LV
Technology
CMOS
Width (mm)
3.9116
Length (mm)
8.65
JESD-30 Code
R-PDSO-G20
Package Code
SSOP
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, SHRINK PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e0
fmax-Min (MHz)
80
Terminal Finish
Tin/Lead (Sn85Pb15)
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Input Conditioning
SCHMITT TRIGGER
Number of Functions
1
Number of Terminals
20
Terminal Pitch (mm)
0.635
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
6
Output Characteristics
3-STATE
Propagation Delay (ns)
0.5
Seated Height-Max (mm)
1.75
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Package Equivalence Code
SSOP20,.25
Moisture Sensitivity Level
1
Number of Inverted Outputs
0
Output Low Current-Max (mA)
24
Peak Reflow Temperature (Cel)
240
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Same Edge Clock Skew Delay-Max (ns)
0.3
Time@Peak Reflow Temperature-Max (s)
20