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QN82530

Intel Corporation

QN82530 Datasheet
Intel Corporation QN82530
  • HTS Code
    8542.31.00.01
  • SB Code
    8542.31.00.30
  • Technology
    NMOS
  • Width (mm)
    16.6
  • Length (mm)
    16.6
  • RAM (words)
    0
  • JESD-30 Code
    S-PQCC-J44
  • Package Code
    QCCJ
  • Boundary Scan
    NO
  • Package Shape
    SQUARE
  • Package Style
    CHIP CARRIER Meter
  • Surface Mount
    YES
  • Terminal Form
    J BEND
  • Low Power Mode
    NO
  • Address Bus Width
    0
  • Bus Compatibility
    MCS 51; MCS 96; IAPX 86; IAPX 88; IAPX 186; IAPX 188
  • DLA Qualification
    Not Qualified
  • Terminal Position
    QUAD
  • Number of I/O Lines
    8
  • Number of Terminals
    44
  • Terminal Pitch (mm)
    1.27
  • Number of Serial I/Os
    2
  • Package Body Material
    PLASTIC/EPOXY
  • Communication Standard
    ASYNC, BIT; SYNC, BYTE
  • Number of DMA Channels
    0
  • On Chip Data RAM Width
    0
  • Seated Height-Max (mm)
    4.57
  • Supply Voltage-Max (V)
    5.25
  • Supply Voltage-Min (V)
    4.75
  • Supply Voltage-Nom (V)
    5
  • External Data Bus Width
    8
  • Clock Frequency-Max (MHz)
    16
  • uPs/uCs/Peripheral ICs Type
    SERIAL IO/COMMUNICATION CONTROLLER, MULTI PROTOCOL
  • Data Encoding/Decoding Method
    NRZ; NRZI; BIPH-SPACE(FM0); BIPH-MARK(FM1); BIPH-LEVEL (MANCHESTER)
  • Data Transfer Rate-Max (MBps)
    0.125

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QN82530
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QN82530