PZ3064AS7EC by Xilinx,Inc. | Sourcengine

Xilinx,Inc. PZ3064AS7EC

Lifecycle status
Discontinued
Description
EE PLD, 9ns, 64-Cell, CMOS, PBGA56
Category
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

JTAG BST
YES
Technology
CMOS
Width (mm)
6
Length (mm)
6
JESD-30 Code
S-PBGA-B56
Organization
2 DEDICATED INPUTS, 44 I/O
Package Code
LFBGA
Package Shape
SQUARE
Package Style
GRID ARRAY, LOW PROFILE, FINE PITCH Meter
Surface Mount
YES
Terminal Form
BALL
J-STD-609 Code
e0
Output Function
MACROCELL
Terminal Finish
TIN LEAD
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
BOTTOM
Additional Feature
YES
Number of I/O Lines
44
Number of Terminals
56
Terminal Pitch (mm)
0.5
Number of Macro Cells
64
Package Body Material
PLASTIC/EPOXY
In-System Programmable
YES
Propagation Delay (ns)
9
Seated Height-Max (mm)
1.35
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Programmable Logic Type
EE PLD
Package Equivalence Code
BGA56,10X10,20
Clock Frequency-Max (MHz)
111
Number of Dedicated Inputs
2
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0