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PLSI1048-50LG/883

Lattice Semiconductor

Lattice Semiconductor PLSI1048-50LG/883
  • ECCN
    3A001.a.2.c
  • ECCN Governance
    EAR
  • HTS Code
    8542.31.00.55
  • SB Code
    8542.31.00.55
  • JTAG BST
    NO
  • Technology
    CMOS
  • JESD-30 Code
    S-XPGA-P132
  • Package Code
    PGA
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY Meter
  • Surface Mount
    NO
  • Terminal Form
    PIN/PEG
  • J-STD-609 Code
    e0
  • Terminal Finish
    Tin/Lead (Sn/Pb)
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    MILITARY
  • Terminal Position
    PERPENDICULAR
  • Additional Feature
    NO
  • Number of Terminals
    132
  • Terminal Pitch (mm)
    2.54
  • Number of Macro Cells
    192
  • Package Body Material
    CERAMIC
  • In-System Programmable
    NO
  • Propagation Delay (ns)
    30.7
  • Supply Voltage-Nom (V)
    5
  • Programmable Logic Type
    EE PLD
  • Package Equivalence Code
    PGA132,14X14
  • Operating Temperature-Max (Cel)
    125
  • Operating Temperature-Min (Cel)
    -55
  • Screening Level / Reference Standard
    38535Q/M;38534H;883B

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PLSI1048-50LG/883
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PLSI1048-50LG/883