PDM42205L15G by PARADIGM TECHNOLOGY INC | Sourcengine

PARADIGM TECHNOLOGY INC PDM42205L15G

Lifecycle status
Discontinued
Description
FIFO, 256X18, 9ns, Synchronous, CMOS, CPGA68
Category
Semiconductors Memory ICs FIFOs OTHER FIFO

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.71
SB Code
8542.32.00.70

Technology
CMOS
JESD-30 Code
S-CPGA-P68
Memory Width
18
Package Code
PGA
Output Enable
YES
Package Shape
SQUARE
Package Style
GRID ARRAY Meter
Surface Mount
NO
Terminal Form
PIN/PEG
J-STD-609 Code
e0
Memory IC Type
OTHER FIFO
Operating Mode
SYNCHRONOUS
Cycle Time (ns)
15
Parallel/Serial
PARALLEL
Terminal Finish
TIN LEAD
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
PERPENDICULAR
Additional Feature
RETRANSMIT
Memory Organization
256X18
Number of Functions
1
Number of Terminals
68
Terminal Pitch (mm)
2.54
Access Time-Max (ns)
9
Number of Words Code
256
Memory Density (bits)
4608
Package Body Material
CERAMIC, METAL-SEALED COFIRED
Output Characteristics
3-STATE
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Number of Words (words)
256
Standby Current-Max (A)
0.07
Supply Current-Max (mA)
190
Package Equivalence Code
PGA68,11X11
Clock Frequency-Max (MHz)
66.7
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0