P4C148-25CM by PYRAMID SEMICONDUCTOR CORP | Sourcengine

PYRAMID SEMICONDUCTOR CORP P4C148-25CM

Lifecycle status
Active
REACH
REACH compliant
Description
Standard SRAM, 1KX4, 25ns, CMOS, CDIP18
Category
Semiconductors Memory ICs SRAMs STANDARD SRAM

ECCN
3A001.a.2.c
ECCN Governance
EAR
HTS Code
8542.32.00.41
SB Code
8542.32.00.40

Technology
CMOS
Width (mm)
7.62
Length (mm)
24.384
JESD-30 Code
R-CDIP-T18
Memory Width
4
Package Code
DIP
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
J-STD-609 Code
e0
Memory IC Type
STANDARD SRAM
Operating Mode
ASYNCHRONOUS
Parallel/Serial
PARALLEL
Terminal Finish
TIN LEAD
DLA Qualification
Not Qualified
Temperature Grade
MILITARY
Terminal Position
DUAL
Memory Organization
1KX4
Number of Functions
1
Number of Terminals
18
Terminal Pitch (mm)
2.54
Access Time-Max (ns)
25
Number of Words Code
1K
Memory Density (bits)
4096
Package Body Material
CERAMIC, METAL-SEALED COFIRED
Seated Height-Max (mm)
5.08
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Number of Words (words)
1024
Operating Temperature-Max (Cel)
125
Operating Temperature-Min (Cel)
-55
Screening Level / Reference Standard
MIL-STD-883