N82C08-16 by Intel Corporation | Sourcengine

Intel Corporation N82C08-16

Lifecycle status
Discontinued
REACH
REACH compliant
Description
DRAM Controller, 1M X 8, CMOS, PQCC68
Category
Semiconductors UPs/uCs/Peripheral ICs Memory Controllers MEMORY CONTROLLER, DRAM

HTS Code
8542.31.00.01
SB Code
8542.31.00.30

Technology
CMOS
Width (mm)
24.2
Length (mm)
24.2
JESD-30 Code
S-PQCC-J68
Package Code
QCCJ
Boundary Scan
NO
Package Shape
SQUARE
Package Style
CHIP CARRIER Meter
Surface Mount
YES
Terminal Form
J BEND
J-STD-609 Code
e0
Low Power Mode
YES
Number of Banks
2
Terminal Finish
TIN LEAD
Address Bus Width
18
Bus Compatibility
IAPX286
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
QUAD
Additional Feature
5 PROGRAMMABLE REFRESH MODES
Memory Organization
1M X 8
Number of Terminals
68
Terminal Pitch (mm)
1.27
Package Body Material
PLASTIC/EPOXY
Seated Height-Max (mm)
4.83
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
External Data Bus Width
0
Supply Current-Max (mA)
42
Package Equivalence Code
LDCC68,1.0SQ
Clock Frequency-Max (MHz)
16
uPs/uCs/Peripheral ICs Type
MEMORY CONTROLLER, DRAM
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0