MT5C2561-25 by Micron Technology | Sourcengine

Micron Technology MT5C2561-25

Lifecycle status
Discontinued
Description
Standard SRAM, 256KX1, 25ns, CMOS, PDIP24
Category
Semiconductors Memory ICs SRAMs STANDARD SRAM

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.41
SB Code
8542.32.00.40

I/O Type
SEPARATE
Technology
CMOS
Width (mm)
7.62
Length (mm)
31.495
JESD-30 Code
R-PDIP-T24
Memory Width
1
Package Code
DIP
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
J-STD-609 Code
e0
Memory IC Type
STANDARD SRAM
Operating Mode
ASYNCHRONOUS
Parallel/Serial
PARALLEL
Terminal Finish
Tin/Lead (Sn/Pb)
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Memory Organization
256KX1
Number of Terminals
24
Terminal Pitch (mm)
2.54
Access Time-Max (ns)
25
Number of Words Code
256K
Memory Density (bits)
262144
Package Body Material
PLASTIC/EPOXY
Output Characteristics
3-STATE
Seated Height-Max (mm)
4.32
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Number of Words (words)
262144
Standby Current-Max (A)
0.005
Standby Voltage-Min (V)
4.5
Supply Current-Max (mA)
125
Package Equivalence Code
DIP24,.3
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0