MT5C1604C-35XT by Micron Technology | Sourcengine

Micron Technology MT5C1604C-35XT

Lifecycle status
Discontinued
Description
Standard SRAM, 4KX4, 35ns, CMOS, CDIP20
Category
Semiconductors Memory ICs SRAMs STANDARD SRAM

ECCN
3A001.a.2.c
ECCN Governance
EAR
HTS Code
8542.32.00.41
SB Code
8542.32.00.40

I/O Type
COMMON
Technology
CMOS
Width (mm)
7.62
Length (mm)
25.4
JESD-30 Code
R-CDIP-T20
Memory Width
4
Package Code
DIP
Package Shape
RECTANGULAR
Package Style
IN-LINE Meter
Surface Mount
NO
Terminal Form
THROUGH-HOLE
J-STD-609 Code
e0
Memory IC Type
STANDARD SRAM
Operating Mode
ASYNCHRONOUS
Parallel/Serial
PARALLEL
Terminal Finish
Tin/Lead (Sn/Pb)
DLA Qualification
Not Qualified
Temperature Grade
MILITARY
Terminal Position
DUAL
Memory Organization
4KX4
Number of Terminals
20
Terminal Pitch (mm)
2.54
Access Time-Max (ns)
35
Number of Words Code
4K
Memory Density (bits)
16384
Package Body Material
CERAMIC, METAL-SEALED COFIRED
Output Characteristics
3-STATE
Seated Height-Max (mm)
3.93
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Number of Words (words)
4096
Standby Voltage-Min (V)
4.5
Supply Current-Max (mA)
110
Package Equivalence Code
DIP20,.3
Operating Temperature-Max (Cel)
125
Operating Temperature-Min (Cel)
-55