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MT54V512H36EF-7.5

Cypress Semiconductor Corporation

Cypress Semiconductor Corporation MT54V512H36EF-7.5
  • ECCN
    3A991.b.2.a
  • ECCN Governance
    EAR
  • HTS Code
    8542.32.00.41
  • SB Code
    8542.32.00.40
  • Technology
    CMOS
  • Width (mm)
    13
  • Length (mm)
    15
  • JESD-30 Code
    R-PBGA-B165
  • Memory Width
    36
  • Package Code
    TBGA
  • Package Shape
    RECTANGULAR
  • Package Style
    GRID ARRAY, THIN PROFILE Meter
  • Surface Mount
    YES
  • Terminal Form
    BALL
  • J-STD-609 Code
    e0
  • Memory IC Type
    QDR SRAM
  • Operating Mode
    SYNCHRONOUS
  • Parallel/Serial
    PARALLEL
  • Terminal Finish
    Tin/Lead (Sn/Pb)
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    COMMERCIAL
  • Terminal Position
    BOTTOM
  • Additional Feature
    PIPELINED ARCHITECTURE
  • Memory Organization
    512KX36
  • Number of Functions
    1
  • Number of Terminals
    165
  • Terminal Pitch (mm)
    1
  • Access Time-Max (ns)
    3
  • Number of Words Code
    512K
  • Memory Density (bits)
    18874368
  • Package Body Material
    PLASTIC/EPOXY
  • Seated Height-Max (mm)
    1.2
  • Supply Voltage-Max (V)
    2.6
  • Supply Voltage-Min (V)
    2.4
  • Supply Voltage-Nom (V)
    2.5
  • Number of Words (words)
    524288
  • Moisture Sensitivity Level
    3
  • Peak Reflow Temperature (Cel)
    NOT SPECIFIED
  • Operating Temperature-Max (Cel)
    70
  • Operating Temperature-Min (Cel)
    0
  • Time@Peak Reflow Temperature-Max (s)
    NOT SPECIFIED

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MT54V512H36EF-7.5