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MN103E0600YD

Panasonic Corporation

Panasonic Corporation MN103E0600YD
  • ECCN
    3A991.a.2
  • ECCN Governance
    EAR
  • HTS Code
    8542.31.00.25
  • SB Code
    8542.31.00.25
  • Bit Size
    32
  • Technology
    CMOS
  • Width (mm)
    11
  • Length (mm)
    11
  • Speed (MHz)
    133
  • ADC Channels
    NO
  • DAC Channels
    NO
  • DMA Channels
    YES
  • JESD-30 Code
    S-CBGA-N239
  • PWM Channels
    YES
  • Package Code
    VFBGA
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY, VERY THIN PROFILE, FINE PITCH Meter
  • Surface Mount
    YES
  • Terminal Form
    NO LEAD
  • Address Bus Width
    0
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    COMMERCIAL
  • Terminal Position
    BOTTOM
  • Number of I/O Lines
    19
  • Number of Terminals
    239
  • Program Memory Type
    MROM
  • Terminal Pitch (mm)
    0.65
  • Package Body Material
    CERAMIC, METAL-SEALED COFIRED
  • Seated Height-Max (mm)
    1
  • Supply Voltage-Max (V)
    1.89
  • Supply Voltage-Min (V)
    1.71
  • Supply Voltage-Nom (V)
    1.8
  • External Data Bus Width
    0
  • Supply Current-Max (mA)
    460
  • Package Equivalence Code
    LGA239,16X16,32
  • Clock Frequency-Max (MHz)
    33.33
  • uPs/uCs/Peripheral ICs Type
    MICROCONTROLLER
  • Peak Reflow Temperature (Cel)
    NOT SPECIFIED
  • Operating Temperature-Max (Cel)
    70
  • Operating Temperature-Min (Cel)
    -20
  • Time@Peak Reflow Temperature-Max (s)
    NOT SPECIFIED

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MN103E0600YD
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MN103E0600YD