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ML4R-67024V-55

TEMIC SEMICONDUCTORS

TEMIC SEMICONDUCTORS ML4R-67024V-55
  • ECCN
    3A001.a.2.c
  • ECCN Governance
    EAR
  • HTS Code
    8542.32.00.41
  • SB Code
    8542.32.00.40
  • I/O Type
    COMMON
  • Technology
    CMOS
  • JESD-30 Code
    S-XQCC-N84
  • Memory Width
    16
  • Package Code
    QCCN
  • Package Shape
    SQUARE
  • Package Style
    CHIP CARRIER Meter
  • Surface Mount
    YES
  • Terminal Form
    NO LEAD
  • J-STD-609 Code
    e0
  • Memory IC Type
    MULTI-PORT SRAM
  • Operating Mode
    ASYNCHRONOUS
  • Number of Ports
    2
  • Parallel/Serial
    PARALLEL
  • Terminal Finish
    Tin/Lead (Sn/Pb)
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    MILITARY
  • Terminal Position
    QUAD
  • Memory Organization
    4KX16
  • Number of Terminals
    84
  • Terminal Pitch (mm)
    1
  • Access Time-Max (ns)
    55
  • Number of Words Code
    4K
  • Memory Density (bits)
    65536
  • Package Body Material
    CERAMIC
  • Output Characteristics
    3-STATE
  • Supply Voltage-Nom (V)
    3.3
  • Number of Words (words)
    4096
  • Standby Current-Max (A)
    5.0E-5
  • Standby Voltage-Min (V)
    2
  • Supply Current-Max (mA)
    140
  • Package Equivalence Code
    LCC84,.9SQ,40
  • Operating Temperature-Max (Cel)
    125
  • Operating Temperature-Min (Cel)
    -55

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ML4R-67024V-55
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ML4R-67024V-55