MK74ZD133Y by INTEGRATED CIRCUIT SYSTEMS INC | Sourcengine

INTEGRATED CIRCUIT SYSTEMS INC MK74ZD133Y

Lifecycle status
Transferred
Description
PLL Based Clock Driver, ZD Series, 32 True Output(s), 0 Inverted Output(s), CMOS, PQFP64
Category
Semiconductors Logic ICs Clock Drivers PLL BASED CLOCK DRIVER

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
ZD
Technology
CMOS
Width (mm)
10
Length (mm)
10
JESD-30 Code
S-PQFP-G64
Package Code
LFQFP
Logic IC Type
PLL BASED CLOCK DRIVER
Package Shape
SQUARE
Package Style
FLATPACK, LOW PROFILE, FINE PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e0
fmax-Min (MHz)
133.34
Terminal Finish
TIN LEAD
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
QUAD
Input Conditioning
STANDARD
Number of Functions
1
Number of Terminals
64
Terminal Pitch (mm)
0.5
Package Body Material
PLASTIC/EPOXY
Number of True Outputs
32
Output Characteristics
3-STATE
Seated Height-Max (mm)
1.6
Supply Voltage-Max (V)
3.45
Supply Voltage-Min (V)
3.15
Supply Voltage-Nom (V)
3.3
Package Equivalence Code
QFP64,.47SQ,20
Number of Inverted Outputs
0
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0
Same Edge Clock Skew Delay-Max (ns)
0.2