MB81C1001-10PJ by Fujitsu Semiconductor America, Inc. | Sourcengine

Fujitsu Semiconductor America, Inc. MB81C1001-10PJ

Lifecycle status
Discontinued
Description
Nibble Mode DRAM, 1MX1, 100ns, CMOS, PDSO20
Category
Semiconductors Memory ICs DRAMs NIBBLE MODE DRAM

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.02
SB Code
8542.32.00.15

Technology
CMOS
Width (mm)
7.62
Access Mode
NIBBLE
Length (mm)
17.15
JESD-30 Code
R-PDSO-J20
Memory Width
1
Package Code
SOJ
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE Meter
Surface Mount
YES
Terminal Form
J BEND
Memory IC Type
NIBBLE MODE DRAM
Operating Mode
ASYNCHRONOUS
Refresh Cycles
512
Number of Ports
1
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Additional Feature
RAS ONLY; CAS BEFORE RAS; HIDDEN REFRESH
Memory Organization
1MX1
Number of Functions
1
Number of Terminals
20
Terminal Pitch (mm)
1.27
Access Time-Max (ns)
100
Number of Words Code
1M
Memory Density (bits)
1048576
Package Body Material
PLASTIC/EPOXY
Output Characteristics
3-STATE
Seated Height-Max (mm)
3.55
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Number of Words (words)
1048576
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0