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MAX17851AUP/V+T

Analog Devices, Inc.

Analog Devices, Inc. MAX17851AUP/V+T
  • HTS Code
    8542.31.00.01
  • SB Code
    8542.31.00.30
  • Technology
    CMOS
  • Width (mm)
    4.4
  • Length (mm)
    6.5
  • JESD-30 Code
    R-PDSO-G20
  • Package Code
    TSSOP
  • Boundary Scan
    NO
  • Package Shape
    RECTANGULAR
  • Package Style
    SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
  • Surface Mount
    YES
  • Terminal Form
    GULL WING
  • J-STD-609 Code
    e3
  • Low Power Mode
    YES
  • Terminal Finish
    Matte Tin (Sn) - annealed
  • Address Bus Width
    0
  • Bus Compatibility
    SPI, UART
  • Terminal Position
    DUAL
  • Number of I/O Lines
    4
  • Number of Terminals
    20
  • Terminal Pitch (mm)
    0.65
  • Number of Serial I/Os
    2
  • Package Body Material
    PLASTIC/EPOXY
  • Communication Standard
    ASYNC, BIT, BYTE, UART
  • Seated Height-Max (mm)
    1.1
  • Supply Voltage-Max (V)
    1.89
  • Supply Voltage-Min (V)
    1.71
  • Supply Voltage-Nom (V)
    1.8
  • Package Equivalence Code
    TSSOP20,.25
  • Clock Frequency-Max (MHz)
    65.28
  • Moisture Sensitivity Level
    1
  • uPs/uCs/Peripheral ICs Type
    SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
  • Data Transfer Rate-Max (MBps)
    0.5
  • Peak Reflow Temperature (Cel)
    260
  • Operating Temperature-Max (Cel)
    125
  • Operating Temperature-Min (Cel)
    -40
  • Screening Level / Reference Standard
    AEC-Q100
  • Time@Peak Reflow Temperature-Max (s)
    30

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MAX17851AUP/V+T
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MAX17851AUP/V+T