M485L2829MT0-LB0 by Samsung Semiconductor, Inc. | Sourcengine

Samsung Semiconductor, Inc. M485L2829MT0-LB0

Lifecycle status
Discontinued
REACH
REACH compliant
Description
DDR DRAM Module, 128MX72, 0.75ns, CMOS
Category
Semiconductors Memory ICs DRAMs DDR DRAM MODULE

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.36
SB Code
8542.32.00.23

I/O Type
COMMON
Technology
CMOS
Access Mode
FOUR BANK PAGE BURST
JESD-30 Code
R-XDMA-N200
Memory Width
72
Organization
128MX72
Package Code
DIMM
Self Refresh
YES
Package Shape
RECTANGULAR
Package Style
MICROELECTRONIC ASSEMBLY Meter
Surface Mount
NO
Terminal Form
NO LEAD
Memory Density
9663676416 bit
Memory IC Type
DDR DRAM MODULE
Operating Mode
SYNCHRONOUS
Refresh Cycles
8192
Terminal Pitch
0.6 mm
Access Time-Max
0.75 ns
Number of Ports
1
Number of Words
134217728 words
Temperature Grade
COMMERCIAL
Terminal Position
DUAL
Additional Feature
AUTO/SELF REFRESH
Supply Current-Max
5170 mA
Number of Functions
1
Number of Terminals
200
Number of Words Code
128M
Qualification Status
Not Qualified
Package Body Material
UNSPECIFIED
Output Characteristics
3-STATE
Package Equivalence Code
DIMM200,24
Operating Temperature-Max
70 Cel
Operating Temperature-Min
0 Cel
Supply Voltage-Max (Vsup)
2.7 V
Supply Voltage-Min (Vsup)
2.3 V
Supply Voltage-Nom (Vsup)
2.5 V
Clock Frequency-Max (fCLK)
133 MHz
Moisture Sensitivity Level
1