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LC4512C-75FN256I

Lattice Semiconductor

Lattice Semiconductor LC4512C-75FN256I
  • ECCN
    3A991.d
  • ECCN Governance
    EAR
  • HTS Code
    8542.31.00.55
  • SB Code
    8542.31.00.55
  • JTAG BST
    YES
  • Width (mm)
    17
  • Length (mm)
    17
  • Architecture
    PAD-TYPE
  • JESD-30 Code
    S-PBGA-B256
  • Organization
    4 DEDICATED INPUTS, 208 I/O
  • Package Code
    BGA
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY Meter
  • Surface Mount
    YES
  • Terminal Form
    BALL
  • J-STD-609 Code
    e1
  • Output Function
    MACROCELL
  • Terminal Finish
    Tin/Silver/Copper (Sn/Ag/Cu)
  • Number of Inputs
    212
  • DLA Qualification
    Not Qualified
  • Number of Outputs
    208
  • Terminal Position
    BOTTOM
  • Number of I/O Lines
    208
  • Number of Terminals
    256
  • Terminal Pitch (mm)
    1
  • Number of Macro Cells
    512
  • Package Body Material
    PLASTIC/EPOXY
  • In-System Programmable
    YES
  • Propagation Delay (ns)
    7.5
  • Seated Height-Max (mm)
    2.1
  • Supply Voltage-Max (V)
    1.95
  • Supply Voltage-Min (V)
    1.65
  • Supply Voltage-Nom (V)
    1.8
  • Number of Product Terms
    83
  • Programmable Logic Type
    EE PLD
  • Package Equivalence Code
    BGA256,16X16,40
  • Clock Frequency-Max (MHz)
    111
  • Moisture Sensitivity Level
    3
  • Number of Dedicated Inputs
    4
  • Peak Reflow Temperature (Cel)
    250
  • Operating Temperature-Max (Cel)
    105
  • Operating Temperature-Min (Cel)
    -40
  • Time@Peak Reflow Temperature-Max (s)
    40

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LC4512C-75FN256I
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LC4512C-75FN256I