ISPLSI2096V-60LT128I by Lattice Semiconductor | Sourcengine

Lattice Semiconductor ISPLSI2096V-60LT128I

Lifecycle status
Discontinued
Description
EE PLD, 20ns, 96-Cell, CMOS, PQFP128
Category
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

JTAG BST
NO
Technology
CMOS
Width (mm)
14
Length (mm)
14
JESD-30 Code
S-PQFP-G128
Organization
2 DEDICATED INPUTS, 96 I/O
Package Code
LFQFP
Package Shape
SQUARE
Package Style
FLATPACK, LOW PROFILE, FINE PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e0
Output Function
MACROCELL
Terminal Finish
Tin/Lead (Sn85Pb15)
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
QUAD
Additional Feature
IN-SYSTEM PROGRAMMABLE
Number of I/O Lines
96
Number of Terminals
128
Terminal Pitch (mm)
0.4
Number of Macro Cells
96
Package Body Material
PLASTIC/EPOXY
In-System Programmable
YES
Propagation Delay (ns)
20
Seated Height-Max (mm)
1.6
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Programmable Logic Type
EE PLD
Package Equivalence Code
QFP128,.64SQ,16
Clock Frequency-Max (MHz)
51.3
Moisture Sensitivity Level
3
Number of Dedicated Inputs
2
Peak Reflow Temperature (Cel)
240
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40
Time@Peak Reflow Temperature-Max (s)
30