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IDT72521L40G

Integrated Device Technology, Inc.

Integrated Device Technology, Inc. IDT72521L40G
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.32.00.71
  • SB Code
    8542.32.00.70
  • Cycle Time
    50 ns
  • Technology
    MOS
  • JESD-30 Code
    S-CPGA-P68
  • Memory Width
    18
  • Organization
    2KX18
  • Package Code
    PGA
  • JESD-609 Code
    e0
  • Output Enable
    NO
  • Package Shape
    SQUARE
  • Package Style
    GRID ARRAY Meter
  • Surface Mount
    NO
  • Terminal Form
    PIN/PEG
  • Memory Density
    36864 bit
  • Memory IC Type
    BI-DIRECTIONAL FIFO
  • Operating Mode
    ASYNCHRONOUS
  • Terminal Pitch
    2.54 mm
  • Access Time-Max
    40 ns
  • Number of Words
    2048 words
  • Parallel/Serial
    PARALLEL
  • Terminal Finish
    TIN LEAD
  • Temperature Grade
    COMMERCIAL
  • Terminal Position
    PERPENDICULAR
  • Additional Feature
    BYPASS XCVR
  • Supply Current-Max
    230 mA
  • Number of Functions
    1
  • Number of Terminals
    68
  • Number of Words Code
    2K
  • Qualification Status
    Not Qualified
  • Package Body Material
    CERAMIC, METAL-SEALED COFIRED
  • Output Characteristics
    3-STATE
  • Package Equivalence Code
    PGA68,11X11
  • Operating Temperature-Max
    70 Cel
  • Operating Temperature-Min
    0 Cel
  • Supply Voltage-Max (Vsup)
    5.5 V
  • Supply Voltage-Min (Vsup)
    4.5 V
  • Supply Voltage-Nom (Vsup)
    5 V
  • Clock Frequency-Max (fCLK)
    20 MHz

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IDT72521L40G
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IDT72521L40G