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HSP48410JC-40

HARRIS SEMICONDUCTOR

HSP48410JC-40 Datasheet
HARRIS SEMICONDUCTOR HSP48410JC-40
  • ECCN
    3A991.a.2
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.60
  • SB Code
    8542.39.00.60
  • Technology
    CMOS
  • JESD-30 Code
    S-PQCC-J84
  • Package Code
    QCCJ
  • Boundary Scan
    NO
  • Package Shape
    SQUARE
  • Package Style
    CHIP CARRIER Meter
  • Surface Mount
    YES
  • Terminal Form
    J BEND
  • J-STD-609 Code
    e0
  • Low Power Mode
    NO
  • Terminal Finish
    Tin/Lead (Sn/Pb)
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    COMMERCIAL
  • Terminal Position
    QUAD
  • Additional Feature
    ICC SPECIFIED @ 33MHZ
  • Number of Terminals
    84
  • Output Data Bus Width
    24
  • Package Body Material
    PLASTIC/EPOXY
  • Supply Voltage-Max (V)
    5.25
  • Supply Voltage-Min (V)
    4.75
  • Supply Voltage-Nom (V)
    5
  • External Data Bus Width
    24
  • Supply Current-Max (mA)
    396
  • Clock Frequency-Max (MHz)
    40
  • uPs/uCs/Peripheral ICs Type
    DSP PERIPHERAL, HISTOGRAM PROCESSOR
  • Operating Temperature-Max (Cel)
    70
  • Operating Temperature-Min (Cel)
    0

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HSP48410JC-40
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HSP48410JC-40