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HSP48212VC-40

HARRIS SEMICONDUCTOR

HARRIS SEMICONDUCTOR HSP48212VC-40
  • ECCN
    3A991.a.2
  • ECCN Governance
    EAR
  • HTS Code
    8542.39.00.60
  • SB Code
    8542.39.00.60
  • Technology
    CMOS
  • JESD-30 Code
    S-MQFP-G64
  • Package Code
    QFP
  • Boundary Scan
    NO
  • Package Shape
    SQUARE
  • Package Style
    FLATPACK Meter
  • Surface Mount
    YES
  • Terminal Form
    GULL WING
  • J-STD-609 Code
    e0
  • Low Power Mode
    NO
  • Terminal Finish
    Tin/Lead (Sn/Pb)
  • DLA Qualification
    Not Qualified
  • Temperature Grade
    COMMERCIAL
  • Terminal Position
    QUAD
  • Additional Feature
    PROGRAMMABLE PIPELINE DELAY OF UP TO 7 CLOCK CYCLES
  • Number of Terminals
    64
  • Output Data Bus Width
    13
  • Package Body Material
    METAL
  • Supply Voltage-Max (V)
    5.25
  • Supply Voltage-Min (V)
    4.75
  • Supply Voltage-Nom (V)
    5
  • External Data Bus Width
    12
  • Supply Current-Max (mA)
    170
  • Clock Frequency-Max (MHz)
    40
  • uPs/uCs/Peripheral ICs Type
    DSP PERIPHERAL, MIXER
  • Operating Temperature-Max (Cel)
    70
  • Operating Temperature-Min (Cel)
    0

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HSP48212VC-40
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HSP48212VC-40