HMT112U7TFR8C-PB by SK Hynix | Sourcengine

SK Hynix HMT112U7TFR8C-PB

Lifecycle status
Discontinued
RoHS
RoHS compliant
Description
DDR3 DRAM Module, 128MX72, 1.25ns, CMOS
Category
Semiconductors Memory ICs DRAMs DDR3 DRAM MODULE

ECCN
EAR99
ECCN Governance
EAR
HTS Code
8542.32.00.36
SB Code
8542.32.00.23

Technology
CMOS
Access Mode
SINGLE BANK PAGE BURST
JESD-30 Code
R-XDMA-N240
Memory Width
72
Package Code
DIMM
Self Refresh
YES
Package Shape
RECTANGULAR
Package Style
MICROELECTRONIC ASSEMBLY Meter
Surface Mount
NO
Terminal Form
NO LEAD
J-STD-609 Code
e1
Memory IC Type
DDR3 DRAM MODULE
Operating Mode
SYNCHRONOUS
Refresh Cycles
8192
Number of Ports
1
Terminal Finish
Tin/Silver/Copper (Sn/Ag/Cu)
DLA Qualification
Not Qualified
Temperature Grade
OTHER
Terminal Position
DUAL
Additional Feature
AUTO/SELF REFRESH
Memory Organization
128MX72
Number of Functions
1
Number of Terminals
240
Terminal Pitch (mm)
1
Access Time-Max (ns)
1.25
Number of Words Code
128M
Memory Density (bits)
9663676416
Package Body Material
UNSPECIFIED
Supply Voltage-Max (V)
1.575
Supply Voltage-Min (V)
1.425
Supply Voltage-Nom (V)
1.5
Number of Words (words)
134217728
Package Equivalence Code
DIMM240,40
Peak Reflow Temperature (Cel)
260
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
0
Time@Peak Reflow Temperature-Max (s)
20