HM67M1864CP-9 by Renesas Technology Corp. | Sourcengine

Renesas Technology Corp. HM67M1864CP-9

Lifecycle status
Transferred
Description
Cache SRAM, 64KX18, 9ns, CMOS, PQCC52
Category
Semiconductors Memory ICs SRAMs CACHE SRAM

ECCN
3A991.b.2.a
ECCN Governance
EAR
HTS Code
8542.32.00.41
SB Code
8542.32.00.40

Technology
CMOS
Width (mm)
19.1262
Length (mm)
19.1262
JESD-30 Code
S-PQCC-J52
Memory Width
18
Package Code
QCCJ
Package Shape
SQUARE
Package Style
CHIP CARRIER Meter
Surface Mount
YES
Terminal Form
J BEND
Memory IC Type
CACHE SRAM
Operating Mode
SYNCHRONOUS
Parallel/Serial
PARALLEL
DLA Qualification
Not Qualified
Temperature Grade
COMMERCIAL
Terminal Position
QUAD
Additional Feature
BURST COUNTER; SELF-TIMED WRITE CYCLE; BYTE WRITE CONTROL
Memory Organization
64KX18
Number of Functions
1
Number of Terminals
52
Terminal Pitch (mm)
1.27
Access Time-Max (ns)
9
Number of Words Code
64K
Memory Density (bits)
1179648
Package Body Material
PLASTIC/EPOXY
Seated Height-Max (mm)
4.57
Supply Voltage-Max (V)
3.6
Supply Voltage-Min (V)
3
Supply Voltage-Nom (V)
3.3
Number of Words (words)
65536
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0