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HM0-6116B-6

MATRA MHS

MATRA MHS HM0-6116B-6
  • ECCN
    EAR99
  • ECCN Governance
    EAR
  • HTS Code
    8542.32.00.41
  • SB Code
    8542.32.00.40
  • Technology
    CMOS
  • JESD-30 Code
    X-XUUC-N24
  • Memory Width
    8
  • Package Code
    DIE
  • Output Enable
    YES
  • Package Shape
    UNSPECIFIED
  • Package Style
    UNCASED CHIP Meter
  • Surface Mount
    YES
  • Terminal Form
    NO LEAD
  • Memory IC Type
    STANDARD SRAM
  • Operating Mode
    ASYNCHRONOUS
  • Number of Ports
    1
  • Parallel/Serial
    PARALLEL
  • DLA Qualification
    Not Qualified
  • Terminal Position
    UPPER
  • Memory Organization
    2KX8
  • Number of Functions
    1
  • Number of Terminals
    24
  • Access Time-Max (ns)
    120
  • Number of Words Code
    2K
  • Memory Density (bits)
    16384
  • Package Body Material
    UNSPECIFIED
  • Output Characteristics
    3-STATE
  • Supply Voltage-Max (V)
    5.5
  • Supply Voltage-Min (V)
    4.5
  • Supply Voltage-Nom (V)
    5
  • Number of Words (words)
    2048
  • Standby Voltage-Min (V)
    2

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HM0-6116B-6
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HM0-6116B-6