HD74ACT112FP by Renesas Technology Corp. | Sourcengine

Renesas Technology Corp. HD74ACT112FP

Lifecycle status
Transferred
Description
J-K Flip-Flop, ACT Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16
Category
Semiconductors Logic ICs FF/Latches J-K FLIP-FLOP

HTS Code
8542.39.00.01
SB Code
8542.39.00.00

Family
ACT
Technology
CMOS
Width (mm)
5.5
Length (mm)
10.06
JESD-30 Code
R-PDSO-G16
Package Code
SOP
Trigger Type
NEGATIVE EDGE
Logic IC Type
J-K FLIP-FLOP
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE Meter
Surface Mount
YES
Terminal Form
GULL WING
Number of Bits
2
fmax-Min (MHz)
80
Output Polarity
COMPLEMENTARY
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
DUAL
Number of Functions
2
Number of Terminals
16
Terminal Pitch (mm)
1.27
Package Body Material
PLASTIC/EPOXY
Propagation Delay (ns)
14
Seated Height-Max (mm)
2.2
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40