EPM9320RC208-15 by ALTERA CORP | Sourcengine

ALTERA CORP EPM9320RC208-15

Lifecycle status
Discontinued
Description
EE PLD, 16ns, 320-Cell, CMOS, PQFP208
Category
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

JTAG BST
YES
Technology
CMOS
Width (mm)
28
Length (mm)
28
JESD-30 Code
S-PQFP-G208
Organization
0 DEDICATED INPUTS, 128 I/O
Package Code
FQFP
Package Shape
SQUARE
Package Style
FLATPACK, FINE PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e0
Output Function
MACROCELL
Terminal Finish
Tin/Lead (Sn/Pb)
Number of Inputs
132
DLA Qualification
Not Qualified
Number of Outputs
128
Temperature Grade
COMMERCIAL
Terminal Position
QUAD
Additional Feature
484 FLIP FLOPS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Number of I/O Lines
128
Number of Terminals
208
Terminal Pitch (mm)
0.5
Number of Macro Cells
320
Package Body Material
PLASTIC/EPOXY
In-System Programmable
YES
Propagation Delay (ns)
16
Seated Height-Max (mm)
4.1
Supply Voltage-Max (V)
5.25
Supply Voltage-Min (V)
4.75
Supply Voltage-Nom (V)
5
Programmable Logic Type
EE PLD
Package Equivalence Code
HQFP208,1.2SQ,20
Clock Frequency-Max (MHz)
117.6
Moisture Sensitivity Level
3
Number of Dedicated Inputs
0
Peak Reflow Temperature (Cel)
220
Operating Temperature-Max (Cel)
70
Operating Temperature-Min (Cel)
0
Time@Peak Reflow Temperature-Max (s)
30