EPM7256ERI208-20 by ALTERA CORP | Sourcengine

ALTERA CORP EPM7256ERI208-20

Lifecycle status
Transferred
REACH
REACH compliant
Description
EE PLD, 20ns, 256-Cell, CMOS, PQFP208
Category
Semiconductors Programmable Logic ICs Programmable Logic Devices EE PLD

HTS Code
8542.39.00.01
SB Code
8542.31.00.55

JTAG BST
NO
Technology
CMOS
Width (mm)
28
Length (mm)
28
JESD-30 Code
S-PQFP-G208
Organization
0 DEDICATED INPUTS, 164 I/O
Package Code
FQFP
Package Shape
SQUARE
Package Style
FLATPACK, FINE PITCH Meter
Surface Mount
YES
Terminal Form
GULL WING
J-STD-609 Code
e0
Output Function
MACROCELL
Terminal Finish
TIN LEAD
DLA Qualification
Not Qualified
Temperature Grade
INDUSTRIAL
Terminal Position
QUAD
Additional Feature
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Number of I/O Lines
164
Number of Terminals
208
Terminal Pitch (mm)
0.5
Number of Macro Cells
256
Package Body Material
PLASTIC/EPOXY
In-System Programmable
NO
Propagation Delay (ns)
20
Seated Height-Max (mm)
4.1
Supply Voltage-Max (V)
5.5
Supply Voltage-Min (V)
4.5
Supply Voltage-Nom (V)
5
Programmable Logic Type
EE PLD
Package Equivalence Code
HQFP208,1.2SQ,20
Clock Frequency-Max (MHz)
83.3
Moisture Sensitivity Level
3
Number of Dedicated Inputs
0
Peak Reflow Temperature (Cel)
220
Operating Temperature-Max (Cel)
85
Operating Temperature-Min (Cel)
-40